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Position:
ASIC Engineer
Role:
Physical Design Engineer
Location:
Bangalore
Job Specification:
Work with internal Physical design
teams and EDA vendors to develop and support ASIC physical design flow.
The position requires an overall understanding of the physical design flow
from RTL to GDS. The successful candidate will possess in-depth
knowledge & experience in physical synthesis, design planning, floor
planning, place & route, static timing analysis, and design closure &
physical verification
Responsibilities
· Work with design to identify areas of flow improvement,
develop plans and implement improvements.
· Support ASIC design tools such as DC, ICC, Magma, STAR-RC,
PT-SI, Verplex, Quartz, Calibre, internal tools & flow, etc.
· Provide tool support and debug issues for & with
members of design team.
· Develop & maintain tool integration and productivity
enhancement tools.
· Develop and maintain a robust release mechanism for the
distribution of the design environment.
· Document & train designers on new methodology &
flow usage.
· Incorporate new tools to improve productivity into block
level & full chip flow.
· Test new features of tool and incorporate the new features
when applicable.
· Enhance current methodology to improve efficiency.
· Will be responsible for all aspects of physical design for
a block while developing methodology.
Qualification Requirements
· 4+ years of experience in physical design.
· Experienced in design automation.
· Understanding of timing constraints, SI prevention, power
reduction.
· Must have prior experience with place and route tools such
as ICC. Magma and etc.
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Must have worked on all aspects of
physical design from placement to route, including extraction, timing, noise
and EM IR analysis and fixes.
· Must have completed design on 40nm and/or 28nm.
· Proficient in Unix/TCL/Perl.
Good communication and presentation skills. Requires
good interpersonal skills and problem-solving ability.
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